ASTM International

Standard Practice for Ensuring Test Consistency in Neutron-Induced Displacement Damage of Electronic Parts
 N E1854

Annotation

This practice sets forth requirements to ensure consistency in neutron-induced displacement damage testing of silicon and gallium arsenide electronic piece parts. This requires controls on facility, dosimetry, tester, and communications processes that affect the accuracy and reproducibility of these tests. It provides background information on the technical basis for the requirements and additional recommendations on neutron testing.

Methods are presented for ensuring and validating consistency in neutron displacement damage testing of electronic parts such as integrated circuits, transistors, and diodes. The issues identified and the controls set forth in this practice address the characterization and suitability of the radiation environments. They generally apply to reactor sources, accelerator-based neutron sources, such as 14-MeV DT sources, and 252Cf sources. Facility and environment characteristics that introduce complications or problems are identified, and recommendations are offered to recognize, minimize or eliminate these problems. This practice may be used by facility users, test personnel, facility operators, and independent process validators to determine the suitability of a specific environment within a facility and of the testing process as a whole. Electrical measurements are addressed in other standards, such as Guide F980. Additional information on conducting irradiations can be found in Practices E798 and F1190. This practice also may be of use to test sponsors (organizations that establish test specifications or otherwise have a vested interest in the performance of electronics in neutron environments).

Methods for the evaluation and control of undesired contributions to damage are discussed in this practice. References to relevant ASTM standards and technical reports are provided. Processes and methods used to arrive at the appropriate test environments and specification levels for electronics